Difficult Interview – Overall Neutral Experience – No – Sat, 3 Jun 2017
Interviewed Apr 2,017 in Cupertino, CA
HR interview over the phone. Then Hiring manager contacted and had a technical phone interview for 1 hour. After a couple of days another technical phone interview with another member from the team for 1 hour. Then was called for onsite interview with 8 panel members each was a 45 minute 1:1 interview.
Interview Questions
STA, Synthesis Flow, Verilog code for divide by 3 clock, basic data structures, placement routing algorithms, Transistor models, equations of current in saturation mode, low power techniques, some behavioral questions.
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Other Details
The interview consisted of Phone Interview and Group/Panel Interview